The present invention relates to a phase correction circuit for a radio communication apparatus and, more particularly, to a phase correction circuit for a radio communication apparatus that has a variable gain amplifier for amplifying a reception signal or transmission signal.
According to a conventional phase shift keying scheme such as a CDMA (Code Division Multiple Access) radio scheme used in digital radio communication systems, data is transmitted in correspondence with each phase of a carrier wave. For example, in a QPSK (Quadrature Phase Shift Keying) scheme, as shown in FIG. 6A, data xe2x80x9c00xe2x80x9d, xe2x80x9c10xe2x80x9d, xe2x80x9c11xe2x80x9d, and xe2x80x9c01xe2x80x9d are transmitted while being assigned as symbols on the I-Q plane to xcfx80/4, 3xcfx80/4, 5xcfx80/4, and 7xcfx80/4 phases, respectively.
In this case, the respective data shift from each other by a xcfx80/4 phase. While holding the phase differences between the respective symbols, only the entire phase, i.e., reference phase can be rotated by xcfx86, as shown in FIG. 6B. In interpolation synchronous detection used in this phase shift keying scheme, the reference phase is rotated for each slot set in a main signal, and rotated for each data in the slot.
FIGS. 7A and 7B show an example of the signal format according to the interpolation synchronous detection scheme, and FIGS. 8A and 8B show a phase change in the interpolation synchronous detection scheme.
In FIG. 7A, respective slots include PILOT portions P1 to P3 each representing the reference phase of a corresponding slot, and DATA portions D1 to D3 each representing transmission data. To detect this signal, the reference phases in respective slots, e.g., the phases of data xe2x80x9c11xe2x80x9d are detected from the PILOT portions P1 to P3 of the slots.
More specifically, in a slot S1, the PILOT portion P1 stores four pilot data xe2x80x9c11xe2x80x9d P11 to P14, as shown in FIG. 7B. A reference phase P10 of the slot S1 shown in FIG. 8A is detected from the average of these symbol positions. Similarly, a reference phase P20 of a slot S2 is detected. The interval from the detected reference phase P20 to the reference phase P10 of the preceding slot is divided by the number of data in the slot, as shown in FIG. 8B. The phase is gradually shifted for each data to establish synchronization.
This conventional radio communication apparatus employs a variable gain amplifier in the analog circuit of a modulator or demodulator. For this reason, a phase change caused by a dynamic gain change in the variable gain amplifier generates an error in reference phase detection based on the pilot signal. A detection error occurs every slot serving as a gain switching unit.
This is because the phase change amount of the variable gain amplifier changes depending on the gain, and the phase relationship between the input signal and output signal of the variable gain amplifier is unbalanced upon a gain change.
It is an object of the present invention to provide a phase correction circuit for a radio communication apparatus that reduces a phase change to prevent a detection error when the phase changes in a variable gain amplifier in accordance with a gain change.
To achieve the above object, according to the present invention, there is provided a phase correction circuit for a radio communication apparatus, comprising a variable gain amplifier for amplifying a transmission/reception signal on the basis of a gain variably set in accordance with a gain signal, and phase correction means, having a phase characteristic opposite to a phase characteristic of the variable gain amplifier, for correcting a phase of the transmission/reception signal on the basis of the gain signal supplied to the variable gain amplifier, and canceling a phase change of the signal caused in the variable gain amplifier.